Fujitsu FR family 32-bit microcontroller instruction manue Uživatelský manuál stáhnout pdf (Strana 47)

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CHAPTER 3 REGISTER DESCRIPTIONS

3.3.3 Table Base Register (TBR)

The Table Base Register (TBR) designates the table containing the entry address for

"EIT" operations.

■ Overview of the Table Base Register

The Table Base Register (TBR) designates the table containing the entry address for "EIT" operations.

When an "EIT" condition occurs, the address of the vector reference is determined by the sum of the

contents of this register and the vector offset corresponding to the "EIT" operation.

Figure 3.3-7 shows an example of the operation of the table base register.

Figure 3.3-7 Sample of Table Base Register (TBR) Operation

Vector correspondence table

Vector no.

Vector offset

Timer

interrupt

3B8

bit310

EAddr0 EAddr1 EAddr2 EAddr3

TBR

87654123

Adder

Vector table

+0 +1 +2 +387654123

+000003B8

876544DB

876544D8

The process of referencing a vector table involves application of address alignment rules

for word access.

Note:

1 2 ... 42 43 44 45 46 47 48 49 50 51 52 ... 313 314

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